An error amplifier is a core part of a voltage control loop in a step-down conversion circuit (BUCK circuit), and stability of the whole BUCK circuit is directly influenced by an operating mode of the error amplifier. FIG. 1 is a schematic diagram illustrating a composition structure of the BUCK circuit. As shown in FIG. 1, in the voltage control loop, an inverted input end of the error amplifier is connected with an output sampling voltage VFB, and an in-phase input end of the error amplifier is connected with a reference voltage VREF. When the BUCK circuit operates in a Pulse Width Modulation (PWM) mode, an output voltage Vc of the error amplifier and sawtooth waves are mutually compared, and a state of a setting end of an SR latch is influenced by virtue of a PWM voltage comparator, so that an aim of changing a duty cycle of switching is achieved, and finally an output voltage of the circuit is stabilized.
A circuit is mutually switched between a Pulse Skip Modulation (PSM) mode and the PWM mode by virtue of a PWM_PSM control circuit under the condition that the BUCK circuit is in a light load mode. In order to reduce power consumption, the error amplifier is closed in the PSM mode by utilizing an enable signal PWM-PSM, so that the output end of the error amplifier is set at an very low level, and therefore, the output voltage of the circuit continuously drops and great and indeterminable ripples are caused due to an extremely small switching duty cycle when the BUCK circuit is switched from the PSM mode to the PWM mode. The loaded output voltage is gradually reduced if the error amplifier is not closed in the PSM mode, so that the output voltage of the error amplifier continuously rises, and therefore, an output level of the error amplifier is very high when the BUCK circuit is switched from the PSM mode to the PWM mode, and great ripples are caused when the output voltage is regulated by PWM. FIG. 2 is an oscillogram illustrating a circuit output voltage Vout and partial operating points of the error amplifier in the existing BUCK circuit during operating.
Accordingly, the output voltage of the circuit would generate great ripples in case of a light load when the BUCK circuit is mutually switched between the PSM mode and the PWM mode if a control circuit of the error amplifier and a compensation network cannot be well designed.